The core idea
A processor design must satisfy a software-visible instruction standard and also operate as physical hardware within a complete system. Successful boot-up connects these two kinds of evidence.
1. What happened in September 2020?
IIT Madras reported that its researchers had successfully booted MOUSHIK, a RISC-V processor and system-on-chip in the SHAKTI family. Its official account attributes processor and board design, assembly and post-silicon boot-up to IIT Madras, fabrication and foundry-specific backend work to the Semi-Conductor Laboratory in Chandigarh, and motherboard manufacturing to Bengaluru. The evidence source is an institutional engineering announcement, not a journal paper.
The milestone demonstrates that a design reached functioning hardware through several collaborating stages. The announcement lists possible Internet of Things applications, including monitoring devices. A possible application is not evidence of deployment at a particular scale. This lesson examines what the demonstrated engineering step means without turning a 2020 announcement into a claim about today's product availability or performance leadership.
Sources: IIT Madras: MOUSHIK boot-up announcement, 24 September 2020 ↗
2. The instruction set is a contract
An instruction set architecture, abbreviated ISA, defines operations that software can ask a processor to perform and their visible behaviour. Instructions may add values, load data from memory, store results or change the next instruction to execute. RISC-V is an open standard ISA. It specifies a shared language between software and hardware; it is not itself a complete physical chip.
Different teams can implement the same supported instructions using different internal arrangements. One implementation may emphasise small size and low energy; another may emphasise speed. Software compatibility depends on the actual instruction extensions and execution environment supported. An open ISA also does not automatically make every implementation's circuit design public. The standard and the design's licence answer different questions.
Sources: RISC-V International: the open instruction-set standard ↗ · RISC-V official ISA manual: introduction ↗
3. A core needs a surrounding system
A processor core fetches instructions, interprets them and updates stored state. Registers are small, fast storage locations used while executing operations. Memory holds larger amounts of instructions and data. A system-on-chip, or SoC, combines a core with supporting components and connections. Peripherals connect computation to the outside world: a timer tracks intervals, and a serial interface exchanges information.
The SHAKTI user manual illustrates how software, board configuration and peripheral access fit together. A program that prints a message requires more than correct addition: the program must be loaded at the right place, the core must run, and the output interface must be configured. A sensor application also needs trustworthy input and an appropriate output circuit. A chip alone cannot complete the whole sensing task.
4. Worked example: trace a control decision
Consider a paper-only tank monitor with illustrative percentage readings. Its rule is: read the level; if it is below 30, set a request flag to 1; otherwise set the flag to 0. For a reading of 27, the comparison 27 < 30 is true, so the flag becomes 1. For 30, the comparison is false, so the flag becomes 0. The boundary is part of the specification.
A conceptual instruction sequence loads the reading, compares it with the threshold, selects a branch and stores the flag. This is an explanation of program behaviour, not MOUSHIK machine code. Test 29, 30 and 31, not just 27: boundary cases expose mistaken comparisons. Also define what happens if the sensor value is missing. Real equipment would need additional safeguards beyond this teaching example.
Sources: RISC-V official ISA manual: introduction ↗ · IIT Madras SHAKTI user manual, version 1.3.1 ↗
5. From logic to manufactured silicon
Before fabrication, designers express behaviour in a hardware description, check it in simulation and convert it into connected logic elements. Physical design arranges those elements and their wiring within a manufacturing process. Timing matters because signals take time to travel and settle. A logically correct design can still fail if a required value arrives too late for the next clocked operation.
Fabrication makes the physical structures; packaging and board assembly connect them to power and other components. Post-silicon validation then tests the real device. Boot-up is an early sequence that starts execution from a defined state. Seeing expected output demonstrates that several paths work together, but cannot prove every instruction, peripheral and operating condition has been exhaustively checked.
Sources: IIT Madras: MOUSHIK boot-up announcement, 24 September 2020 ↗ · SHAKTI project: processor and system overview ↗
6. Worked example: speed and energy need units
Suppose a fictional task executes 120,000 instructions, averaging two clock cycles per instruction on a 40 MHz core. MHz means one million cycles per second. Total cycles are 120,000 × 2 = 240,000, and time is 240,000 ÷ 40,000,000 = 0.006 seconds, or 6 milliseconds. A higher clock rate is only one influence: instruction count and cycles per instruction also matter.
If average power during that task is 0.2 watts, energy is power × time = 0.2 × 0.006 = 0.0012 joules, or 1.2 millijoules. Another design taking 8 milliseconds at 0.1 watts uses 0.8 millijoules. It is slower but uses less energy for this task. These are illustrative designs, not measured MOUSHIK specifications. Fair benchmarking uses the same work and includes relevant memory and peripheral costs.
A design becomes a working system
- Instruction contractSpecify software-visible operations and supported extensions.
- Logic and verificationImplement behaviour; test ordinary and boundary cases.
- Physical implementationArrange circuits, fabricate, package and connect the board.
- Boot and validationStart the real system, then test its required behaviours.
Sources: SHAKTI project: processor and system overview ↗ · RISC-V official ISA manual: introduction ↗
7. What stronger evidence would look like
A verification plan connects requirements to tests. Arithmetic tests need ordinary values and boundary cases; memory tests check that stored data can be retrieved correctly; peripheral tests check communication and timing. Repeating a single successful demonstration is useful for repeatability but leaves untested behaviours untouched. A reported benchmark should state workload, software settings, hardware configuration and what was measured.
The Indian engineering contribution includes building skills and working interfaces across design, manufacturing and software. Assessing that contribution does not require claiming that every local design is automatically secure or fastest. Inspectability can help evaluation, while security and reliability still depend on explicit requirements and evidence. The strongest achievement statement says exactly which system worked and which tests established that result.
Sources: IIT Madras: MOUSHIK boot-up announcement, 24 September 2020 ↗ · IIT Madras SHAKTI user manual, version 1.3.1 ↗ · RISC-V International: the open instruction-set standard ↗
PUT IT INTO PRACTICE
Practice: specify and test a miniature controller
- Define a fictional input and a threshold rule in one precise sentence, including what happens at equality.
- Trace the output for a value below, at and above the threshold. Add one missing-input case.
- For 200,000 instructions at three cycles each and 50 MHz, calculate execution time. At 0.15 W, calculate energy.
- Write a test report separating successful boot, correct output and measured performance. State what one demonstration leaves untested.
Check your understanding
What are the practice time and energy?
There are 600,000 cycles. Time is 0.012 seconds, or 12 ms. Energy is 0.15 × 0.012 = 0.0018 J, or 1.8 mJ.
Why is RISC-V not the name of one particular chip?
It defines an instruction standard that many different processor designs can implement.
Why test a threshold value exactly?
It distinguishes 'less than' from 'less than or equal to', which produce different behaviour at the boundary.
Does a successful boot prove complete reliability?
No. It demonstrates a working start-up path. Other operations, conditions and long-term behaviour require further tests.
Can a slower processor use less energy for a task?
Yes. Energy depends on power multiplied by time. A sufficient power reduction can outweigh a longer execution time.
What does the 24 September 2020 source establish?
It records IIT Madras's successful MOUSHIK boot-up announcement and participating engineering stages. It does not establish present retail availability.